Had a nice discussion over email I wanted to repost here with Craig Versek, who’s worked with the module. Basically he felt we could speed up the delay (currently 1us down to 100ns), and had suggestions on the limits of what we can do with the ADC…
Perfect - yes speeding up the delay’s totally makes sense. That saves a ton of time! I’ll check out that code. Can I post most of this to the forum so that others can see it also? - it’ll be helpful information I think - perhaps we could continue the conversation there also.
The ADC library is useful - when we moved to a separate 4 channel 16 bit ADC I stopped paying attention to the teensy on-board ADC so I hadn’t seen that. Also, the differential mode may be useful…
A few thoughts:
One our current design, we have a +8V line for other reasons. That line is pretty rock solid. We would benefit from using that as a voltage reference line for the ADC’s right?
As you probably know, the Teensy’s default ADC reference is the 3.3V rail, but there is also an internal, more stable reference at 1.2V which can be configured in the ADC library. The AREF pin can be used for an external reference, but I believe 8V is too high and could cause damage (probably should be at or below 3.3V). Also, if you do have an external reference at AREF it needs to be a shunt type and not a power supply (see this thread). So you could possibly hang a shunt reference off this 8V line but I’m not sure it would be worth the expense - and if it’s being used to power motors or relays, then I would avoid that because of noise interference concerns.
I measured the max output of the microspec module directly which seemed to be around 4.5V if I am remembering correctly. I decided to be a little sloppy and just let the inputs clip to the 3.3V ref if the light intensity was too high, but sometimes you see people warning that damage can happen on ADC inputs above 3.6V - I haven’t seen it, but maybe it is slowly biasing some property? If you are worried about long term performance the output can be adjusted down with a voltage divider or even better an op amp attenuator circuit that would also hopefully lower the signal impedance and make quick sampling more accurate. Mind you, I haven’t checked out what the groupgets module outputs, because I don’t have one.
Also, since there are dual ADCs we could have two separate analog lines simultaneously (near simultaneously? If so how near?) sample the minispec. ’
This might be possible, but I don’t think sampling the same voltage simultaneously will improve the result much, since the most probable noise sources would likely correlate in time over the two closely located ADC channels. If you want more accuracy at the expense of speed, then set the automatic sample averaging feature of the ADC.
That would allow us to do some averages and improve the signal and maybe drop the speed. The ADC clock is 24 MHz (40ns) at 12 bit and 12 MHz at 16 bit, so that’s pretty fast, should allow for fast ADC reads I’d think!
Yes, especially if the firmware is programmed to reduce overhead between ADC readouts. For instance you could use a continuous sampling mode with DMA, but then we would need to figure out a way to synchronize it with the pixel clock-out.