Data acquisition daughter card for OpalKelly FPGA

I am planning on a general-purpose data acquisition daughter card that mates to the XEM7310 OpalKelly FPGA module. A first revision has been designed, fabricated, and tested (and works but has some bugs to fix). This is targeting real-time control with 10 - 100 kHz bandwidth. The basics are:

  1. 4x ADC channels at 16-bits @ 5 MSPS
  2. 4x DAC channels at 14-bits and 1-us settling time
  3. 8x slower ADC channels on a multiplexed single-chip ADC
  4. similar slow DAC outputs
  5. GPIOs with level-shifting capability
  6. power supplies for expansion cards

Iā€™m very interested in finding individuals that would be interested in collaborating on this design. The plan is to use an open-source hardware ethos and possibly apply for OSHWA certification. The first board design used Eagle but I am migrating to KiCAD.

Please reach out if you might have interest in collaborating.